TERRASSON, Guillaume; BRIAND, Renaud; BASROUR, Skandar

doi:10.1166/jolpe.2009.1020

Métadonnées

Afficher la notice complète

Licence d’utilisation du document

TERRASSON, Guillaume

ESTIA INSTITUTE OF TECHNOLOGY

BRIAND, Renaud

ESTIA INSTITUTE OF TECHNOLOGY

BASROUR, Skandar

Langue

Article de revue

Ce document a été publié dans

Journal of Low Power Electronics. 2009, vol. 5, n° 2, p. 196-205

Résumé en anglais

n wireless sensor network applications, autonomy is a critical feature. So, a new design method under power consumption constraint, dedicated to inductively degenerated Low-Noise Amplifier, is proposed in this article. A detailed analysis of power consumption, gain, noise and linearity performances of this topology is performed. The simulation results using MATLAB show the impact of each MOSFET dimensions into Low-Noise Amplifier performances. Based on these results, a new method to design Low-Noise Amplifier is proposed using an example. A 868-MHz Low-Noise Amplifier is then designed in CMOS 0.35 μm technology to validate our method. Considering the literature, measurement results show good characteristics: 13 dB gain, 1.5 dB Noise Figure with an ultra low-power consumption of 6.7 mW at supply voltage of 2 V.< Réduire

Mots clés en anglais

wireless sensor network

CMOS

Métadonnées

Partager cette publication !

Licence d’utilisation du document

A Design Technique for Power Constrained CMOS Low-Noise Amplifier Dedicated to Wireless Sensor Networks

Langue

Ce document a été publié dans

Résumé en anglais

Mots clés en anglais

URI

DOI

Unités de recherche