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A (0.75-1.13)mW and (2.4-5.2)ps RMS jitter Integer-N based Dual-Loop PLL for Indoor and Outdoor Positioning in 28nm FD-SOI CMOS Technology
Language
EN
Article de revue
This item was published in
IEEE Transactions on Circuits and Systems II: Express Briefs. 2023-07-05p. 1-1