Design of an 8GSps, 65nm CMOS Wideband Flash Analog-to-Digital Converter
| hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
| dc.contributor.author | ROSSONI MATTOS, Diego | |
| hal.structure.identifier | FORMATION STELLAIRE 2011 | |
| dc.contributor.author | GAUFFRE, S. | |
| hal.structure.identifier | Centre d'Etudes Nucléaires de Bordeaux Gradignan [CENBG] | |
| dc.contributor.author | HELLMUTH, P. | |
| hal.structure.identifier | FORMATION STELLAIRE 2011 | |
| dc.contributor.author | CAIS, Ph. | |
| hal.structure.identifier | Centre d'Etudes Nucléaires de Bordeaux Gradignan [CENBG] | |
| dc.contributor.author | PEDROZA, J.L. | |
| hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
| dc.contributor.author | BEGUERET, Jean-Baptiste | |
| hal.structure.identifier | FORMATION STELLAIRE 2011 | |
| dc.contributor.author | BAUDRY, Alain | |
| dc.date.issued | 2011-12-11 | |
| dc.date.conference | 2011-12-11 | |
| dc.description.abstractEn | This paper describes the design of an 8Gsps flash Analog-to-Digital Converter (ADC) for wideband radio astronomy applications. The ADC contains a track-and-hold (TAH) and a 1-to-4 demultiplexer. Our circuit has been fabricated with the 65nm technology from STMicroelectronics. The post-layout simulations show a Figure of Merit (FoM) of 11.36pJ/conv.step and a power consumption of 480mW at Nyquist sampling condition. The ongoing tests will soon verify these predictions | |
| dc.language.iso | en | |
| dc.source.title | Design of an 8GSps, 65nm CMOS Wideband Flash Analog-to-Digital Converter | |
| dc.title.en | Design of an 8GSps, 65nm CMOS Wideband Flash Analog-to-Digital Converter | |
| dc.type | Communication dans un congrès | |
| dc.subject.hal | Sciences de l'ingénieur [physics]/Electronique | |
| bordeaux.page | 22-26 | |
| bordeaux.conference.title | ICECS | |
| bordeaux.country | LB | |
| bordeaux.title.proceeding | Design of an 8GSps, 65nm CMOS Wideband Flash Analog-to-Digital Converter | |
| bordeaux.conference.city | BEYROUTH | |
| bordeaux.peerReviewed | oui | |
| hal.identifier | hal-00656796 | |
| hal.version | 1 | |
| hal.invited | non | |
| hal.proceedings | oui | |
| hal.conference.end | 2011-12-14 | |
| hal.popular | non | |
| hal.audience | Internationale | |
| hal.origin.link | https://hal.archives-ouvertes.fr//hal-00656796v1 | |
| bordeaux.COinS | ctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.btitle=Design%20of%20an%208GSps,%2065nm%20CMOS%20Wideband%20Flash%20Analog-to-Digital%20Converter&rft.date=2011-12-11&rft.spage=22-26&rft.epage=22-26&rft.au=ROSSONI%20MATTOS,%20Diego&GAUFFRE,%20S.&HELLMUTH,%20P.&CAIS,%20Ph.&PEDROZA,%20J.L.&rft.genre=unknown |
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