High-throughput FFT architectures using HLS tools
| dc.rights.license | open | en_US |
| hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
| dc.contributor.author | ALMORIN, Hugues | |
| hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
| dc.contributor.author | LE GAL, Bertrand | |
| hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
| dc.contributor.author | CRENNE, Jeremie | |
| hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
| dc.contributor.author | JEGO, Christophe | |
| dc.contributor.author | KISSEL, Vincent | |
| dc.date.accessioned | 2024-05-21T07:52:55Z | |
| dc.date.available | 2024-05-21T07:52:55Z | |
| dc.date.issued | 2022-10 | |
| dc.date.conference | 2022-10-24 | |
| dc.identifier.issn | 2473-2001 | en_US |
| dc.identifier.uri | https://oskar-bordeaux.fr/handle/20.500.12278/199945 | |
| dc.description.abstractEn | High-Level Synthesis (HLS) tools are an attractive option for fast prototyping and implementation of hardware accelerators performing digital signal processing algorithms such as the Fast Fourier Transform (FFT). However, the efficiency and the performance level of the generated architectures depend on the behavioral models. Moreover, Design Space Exploration features enabled by HLS tools are limited by the behavioral model parallelization features. In this paper, a generic FFT behavioral model usable within HLS tools is presented. Its configurable parameters enable to cover a broader architectural space by taking advantage of more parallelization strategies contrary of related works. Thus, this designed model can produce low-complexity architectures up to high throughput ones as highlighted by experimental results. | |
| dc.language.iso | EN | en_US |
| dc.subject | Fast Fourier transforms | |
| dc.subject | Signal processing algorithms | |
| dc.subject | Digital signal processing | |
| dc.subject | Licenses | |
| dc.subject | Throughput | |
| dc.subject | Behavioral sciences | |
| dc.subject | Space exploration | |
| dc.subject | FFT | |
| dc.subject | Digital architecture | |
| dc.subject | FPGA | |
| dc.subject | HLS | |
| dc.subject | Model | |
| dc.title.en | High-throughput FFT architectures using HLS tools | |
| dc.type | Communication dans un congrès | en_US |
| dc.identifier.doi | 10.1109/ICECS202256217.2022.9970886 | en_US |
| dc.subject.hal | Sciences de l'ingénieur [physics]/Electronique | en_US |
| bordeaux.page | 1-4 | en_US |
| bordeaux.hal.laboratories | IMS : Laboratoire de l'Intégration du Matériau au Système - UMR 5218 | en_US |
| bordeaux.institution | Université de Bordeaux | en_US |
| bordeaux.institution | Bordeaux INP | en_US |
| bordeaux.institution | CNRS | en_US |
| bordeaux.conference.title | 2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS) | en_US |
| bordeaux.country | gb | en_US |
| bordeaux.title.proceeding | 2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS) | en_US |
| bordeaux.team | CIRCUIT DESIGN-CSN | en_US |
| bordeaux.conference.city | Glasgow | en_US |
| hal.invited | oui | en_US |
| hal.proceedings | oui | en_US |
| hal.conference.end | 2022-10-26 | |
| hal.popular | non | en_US |
| hal.audience | Internationale | en_US |
| hal.export | false | |
| dc.rights.cc | Pas de Licence CC | en_US |
| bordeaux.COinS | ctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.date=2022-10&rft.spage=1-4&rft.epage=1-4&rft.eissn=2473-2001&rft.issn=2473-2001&rft.au=ALMORIN,%20Hugues&LE%20GAL,%20Bertrand&CRENNE,%20Jeremie&JEGO,%20Christophe&KISSEL,%20Vincent&rft.genre=unknown |
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