Show simple item record

MBSPDiscover: An Automatic Benchmark for MultiBSP Performance Analysis

hal.structure.identifierLaboratorio de Investigación y Desarrollo en Inteligencia Computacional [San Luis] [LIDIC]
dc.contributor.authorALANIZ, Marcelo
hal.structure.identifierCeCal - High Performance Computing
dc.contributor.authorNESMACHNOW, Sergio
hal.structure.identifierEfficient runtime systems for parallel architectures [RUNTIME]
hal.structure.identifierLaboratoire Bordelais de Recherche en Informatique [LaBRI]
dc.contributor.authorGOGLIN, Brice
hal.structure.identifierCeCal - High Performance Computing
dc.contributor.authorITURRIAGA, Santiago
hal.structure.identifierLaboratorio de Investigación y Desarrollo en Inteligencia Computacional [San Luis] [LIDIC]
dc.contributor.authorGIL COSTA, Veronica
hal.structure.identifierLaboratorio de Investigación y Desarrollo en Inteligencia Computacional [San Luis] [LIDIC]
dc.contributor.authorPRINTISTA, Marcela
dc.date.accessioned2024-04-15T09:58:04Z
dc.date.available2024-04-15T09:58:04Z
dc.date.created2014-08
dc.date.issued2014-10-20
dc.date.conference2014-10-20
dc.identifier.urihttps://oskar-bordeaux.fr/handle/20.500.12278/198970
dc.description.abstractEnMulti-Bulk Synchronous Parallel (MultiBSP) is a recently proposed parallel programming model for multicore machines that extends the classic BSP model. MultiBSP is very useful to design algorithms and estimate their running time, which are hard to do in High Performance Computing applications. For a correct estimation of the running time, the main parameters of the MultiBSP model for different multicore architectures need to be determined. This article presents a benchmark proposal for measuring the parameters that characterize the communication and synchronization cost for the model. Our approach discovers automatically the hierarchical structure of the multicore architecture by using a specific tool (hwloc) that allows obtaining runtime information about the machine. We describe the design, implementation and the results of benchmarking two multicore machines. Furthermore, we report the validation of the proposed method by using a real MultiBSP implementation of the vector inner product algorithm and comparing the predicted execution time against the real execution time.
dc.language.isoen
dc.publisherSpringer
dc.title.enMBSPDiscover: An Automatic Benchmark for MultiBSP Performance Analysis
dc.typeCommunication dans un congrès
dc.subject.halInformatique [cs]/Système d'exploitation [cs.OS]
bordeaux.page158-172
bordeaux.volume485
bordeaux.hal.laboratoriesLaboratoire Bordelais de Recherche en Informatique (LaBRI) - UMR 5800*
bordeaux.institutionUniversité de Bordeaux
bordeaux.institutionBordeaux INP
bordeaux.institutionCNRS
bordeaux.conference.titleFirst HPCLATAM - CLCAR Joint Latin American High Performance Computing Conference
bordeaux.countryCL
bordeaux.conference.cityValparaiso
bordeaux.peerReviewedoui
hal.identifierhal-01062528
hal.version1
hal.invitednon
hal.proceedingsoui
hal.conference.end2014-10-22
hal.popularnon
hal.audienceInternationale
hal.origin.linkhttps://hal.archives-ouvertes.fr//hal-01062528v1
bordeaux.COinSctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.date=2014-10-20&rft.volume=485&rft.spage=158-172&rft.epage=158-172&rft.au=ALANIZ,%20Marcelo&NESMACHNOW,%20Sergio&GOGLIN,%20Brice&ITURRIAGA,%20Santiago&GIL%20COSTA,%20Veronica&rft.genre=unknown


Files in this item

FilesSizeFormatView

There are no files associated with this item.

This item appears in the following Collection(s)

Show simple item record