Methodology of backside preparation applied on a MRAM to lead a logical investigation with a near-field probe
DUMAS, Louise
Laboratoire de l'intégration, du matériau au système [IMS]
DGA Maîtrise de l'information [DGA.MI]
LAboratoire PLasma et Conversion d'Energie [LAPLACE]
Centre National d'Études Spatiales [Toulouse] [CNES]
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Laboratoire de l'intégration, du matériau au système [IMS]
DGA Maîtrise de l'information [DGA.MI]
LAboratoire PLasma et Conversion d'Energie [LAPLACE]
Centre National d'Études Spatiales [Toulouse] [CNES]
DUMAS, Louise
Laboratoire de l'intégration, du matériau au système [IMS]
DGA Maîtrise de l'information [DGA.MI]
LAboratoire PLasma et Conversion d'Energie [LAPLACE]
Centre National d'Études Spatiales [Toulouse] [CNES]
< Réduire
Laboratoire de l'intégration, du matériau au système [IMS]
DGA Maîtrise de l'information [DGA.MI]
LAboratoire PLasma et Conversion d'Energie [LAPLACE]
Centre National d'Études Spatiales [Toulouse] [CNES]
Langue
EN
Communication dans un congrès
Ce document a été publié dans
Special issue of 34th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, ESREF 2023, ESRF 2023, 2023-10-02, TOULOUSE. 2023-11-03, vol. 150, p. 115102
Elsevier BV
Résumé
This paper presents a method for the preparation of a magnetic random access memory (MRAM) whose data are stored in magnetic tunnel junctions (MTJ) as resistance states, in order to read them by near-field probing.The goal ...Lire la suite >
This paper presents a method for the preparation of a magnetic random access memory (MRAM) whose data are stored in magnetic tunnel junctions (MTJ) as resistance states, in order to read them by near-field probing.The goal is to be able to visualize a difference of resistance between bits at ‘0’ and at ‘1’ thanks to the current passing through several MTJs. To do so, the MRAM needs to be prepared to create an electrical access to both sides of the MTJs. The main issue is the polishing of both sides as the stack of metallization being less than 10 μm thick. A chemical etch would in that case be encouraged by literature but we take a different approach since we choose to open further than the transistors. The preferred method is a backside preparation technique that creates a bevel allowing us to access the bottom side of the MTJs through vias and the top of them thanks to the bitlines. Since the resulting chip no longer has electrical connections, we also create a dedicated electrical path thanks to a focused ion beam (FIB) operation. At the end, it is then possible to collect the current flowing through the MTJs with a near-field probe. To probe the MTJ resistance, two near-field techniques are investigated: conductive atomic force microscopy (C-AFM) and scanning spreading resistance microscopy (SSRM). C-AFM provides a quite high resistivity probably due to its sensitivity to contact resistance. Using SSRM, a resistance of 12–16 kΩ and 17–22 kΩ were determined for “0” and “1” bits, which is in agreement with literature.< Réduire
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