NIC-assisted cache-efficient receive stack for message passing over Ethernet
| hal.structure.identifier | Efficient runtime systems for parallel architectures [RUNTIME] | |
| hal.structure.identifier | Laboratoire Bordelais de Recherche en Informatique [LaBRI] | |
| dc.contributor.author | GOGLIN, Brice | |
| dc.date.accessioned | 2024-04-15T09:49:20Z | |
| dc.date.available | 2024-04-15T09:49:20Z | |
| dc.date.issued | 2011 | |
| dc.identifier.issn | 1532-0626 | |
| dc.identifier.uri | https://oskar-bordeaux.fr/handle/20.500.12278/198247 | |
| dc.description.abstractEn | High-speed networking in clusters usually relies on advanced hardware features in the NICs, such as zero-copy capability. Open-MX is a high-performance message passing stack tailored for regular Ethernet hardware without such capabilities. We present the addition of a multiqueue support in the Open-MX receive stack so that all incoming packets for the same process are handled on the same core. We then introduce the idea of binding the target end process near its dedicated receive queue. This model leads to a more cache-efficient receive stack for Open-MX. It also proves that very simple and stateless hardware features may have a significant impact on message passing performance over Ethernet. The implementation of this model in a firmware reveals that it may not be as efficient as some manually tuned micro-benchmarks. But our multiqueue receive stack generally performs better than the original single queue stack, especially on large communication patterns where multiple processes are involved and manual binding is difficult. | |
| dc.language.iso | en | |
| dc.publisher | Wiley | |
| dc.title.en | NIC-assisted cache-efficient receive stack for message passing over Ethernet | |
| dc.type | Article de revue | |
| dc.identifier.doi | 10.1002/cpe.1632 | |
| dc.subject.hal | Informatique [cs]/Système d'exploitation [cs.OS] | |
| bordeaux.journal | Concurrency and Computation: Practice and Experience | |
| bordeaux.page | 199-210 | |
| bordeaux.volume | 23 | |
| bordeaux.hal.laboratories | Laboratoire Bordelais de Recherche en Informatique (LaBRI) - UMR 5800 | * |
| bordeaux.issue | 2 | |
| bordeaux.institution | Université de Bordeaux | |
| bordeaux.institution | Bordeaux INP | |
| bordeaux.institution | CNRS | |
| bordeaux.peerReviewed | oui | |
| hal.identifier | inria-00496301 | |
| hal.version | 1 | |
| hal.popular | non | |
| hal.audience | Internationale | |
| hal.origin.link | https://hal.archives-ouvertes.fr//inria-00496301v1 | |
| bordeaux.COinS | ctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.jtitle=Concurrency%20and%20Computation:%20Practice%20and%20Experience&rft.date=2011&rft.volume=23&rft.issue=2&rft.spage=199-210&rft.epage=199-210&rft.eissn=1532-0626&rft.issn=1532-0626&rft.au=GOGLIN,%20Brice&rft.genre=article |
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