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hal.structure.identifierParallélisme, Réseaux, Systèmes, Modélisation [PRISM]
dc.contributor.authorMAZOUZ, Abdelhafid
hal.structure.identifierParallélisme, Réseaux, Systèmes, Modélisation [PRISM]
hal.structure.identifierArchitectures, Languages and Compilers to Harness the End of Moore Years [ALCHEMY]
dc.contributor.authorTOUATI, Sid
hal.structure.identifierEfficient runtime systems for parallel architectures [RUNTIME]
hal.structure.identifierLaboratoire Bordelais de Recherche en Informatique [LaBRI]
dc.contributor.authorBARTHOU, Denis
dc.date.accessioned2024-04-15T09:46:45Z
dc.date.available2024-04-15T09:46:45Z
dc.date.issued2011
dc.date.conference2011-01-23
dc.identifier.urihttps://oskar-bordeaux.fr/handle/20.500.12278/198036
dc.description.abstractEnIn [8], we demonstrated that contrary to sequential applications, parallel OpenMP appli- cations su er from a severe instability in performances. That is, running the same parallel OpenMP application with the same data input multiple times may exhibit a high variability of execution times. In this article, we continue our research e ort to analyse the reason of such performance variability. With the architectural complexity of the new state of the art hardware designs, comes a need to better understand the interactions between the operating system layers, the applications and the underlying hardware platforms. The ability to characterise and to quantify those interactions can be useful in the processes of performance evaluation and analysis, compiler optimisations and operating system job scheduling allowing to achieve better performance stability, reproducibility and predictability. Under- standing the performance instability in current multicore architectures is even more complicated by the variety of factors and sources in uencing the applications performances. This article focus on the e ects of thread binding, co-running processes, L2 cache sharing, automatic hardware prefetcher and memory page sizes.
dc.language.isoen
dc.title.enAnalysing the Variability of OpenMP Programs Performances on Multicore Architectures
dc.typeCommunication dans un congrès
dc.subject.halInformatique [cs]/Autre [cs.OH]
bordeaux.page14
bordeaux.hal.laboratoriesLaboratoire Bordelais de Recherche en Informatique (LaBRI) - UMR 5800*
bordeaux.institutionUniversité de Bordeaux
bordeaux.institutionBordeaux INP
bordeaux.institutionCNRS
bordeaux.conference.titleFourth Workshop on Programmability Issues for Heterogeneous Multicores (MULTIPROG-2011)
bordeaux.countryGR
bordeaux.conference.cityHeraklion
bordeaux.peerReviewedoui
hal.identifierinria-00637957
hal.version1
hal.invitednon
hal.proceedingsoui
hal.conference.organizerHeld in conjunction with: the 6th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC)
hal.popularnon
hal.audienceInternationale
hal.origin.linkhttps://hal.archives-ouvertes.fr//inria-00637957v1
bordeaux.COinSctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.date=2011&rft.spage=14&rft.epage=14&rft.au=MAZOUZ,%20Abdelhafid&TOUATI,%20Sid&BARTHOU,%20Denis&rft.genre=unknown


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