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LU Factorization for Accelerator-based Systems

hal.structure.identifierLaboratoire Bordelais de Recherche en Informatique [LaBRI]
hal.structure.identifierHigh-End Parallel Algorithms for Challenging Numerical Simulations [HiePACS]
dc.contributor.authorAGULLO, Emmanuel
hal.structure.identifierLaboratoire Bordelais de Recherche en Informatique [LaBRI]
hal.structure.identifierEfficient runtime systems for parallel architectures [RUNTIME]
dc.contributor.authorAUGONNET, Cédric
hal.structure.identifierInnovative Computing Laboratory [Knoxville] [ICL]
dc.contributor.authorDONGARRA, Jack
hal.structure.identifierInnovative Computing Laboratory [Knoxville] [ICL]
dc.contributor.authorFAVERGE, Mathieu
hal.structure.identifierDepartment of Mathematical and Statistical Sciences
dc.contributor.authorLANGOU, Julien
hal.structure.identifierInnovative Computing Laboratory [Knoxville] [ICL]
dc.contributor.authorLTAIEF, Hatem
hal.structure.identifierInnovative Computing Laboratory [Knoxville] [ICL]
dc.contributor.authorTOMOV, Stanimire
dc.date.accessioned2024-04-15T09:45:58Z
dc.date.available2024-04-15T09:45:58Z
dc.date.issued2011-06
dc.date.conference2011-06-27
dc.identifier.urihttps://oskar-bordeaux.fr/handle/20.500.12278/197966
dc.description.abstractEnMulticore architectures enhanced with multiple GPUs are likely to become mainstream High Performance Computing (HPC) platforms in a near future. In this paper, we present the design and implementation of an LU factorization using tile algorithm that can fully exploit the potential of such platforms in spite of their complexity. We use a methodology derived from previous work on Cholesky and QR factor- izations. Our contributions essentially consist of providing new CPU/GPU hybrid LU kernels, studying the impact on performance of the looking variants as well as the storage layout in presence of pivoting, tuning the kernels for two different machines composed of multiple recent NVIDIA Tesla S1070 (four GPUs total) and Fermi-based S2050 GPUs (three GPUs total), respectively. The hybrid tile LU asymptotically achieves 1 Tflop/s in single precision on both hardwares. The performance in double precision arithmetic reaches 500 Gflop/s on the Fermi-based system, twice faster than the old GPU generation of Tesla S1070. We also discuss the impact of the number of tiles on the numerical stability. We show that the numerical results of the tile LU factorization will be accurate enough for most applications as long as the computations are performed in double precision arithmetic.
dc.language.isoen
dc.title.enLU Factorization for Accelerator-based Systems
dc.typeCommunication dans un congrès
dc.subject.halInformatique [cs]/Calcul parallèle, distribué et partagé [cs.DC]
bordeaux.hal.laboratoriesLaboratoire Bordelais de Recherche en Informatique (LaBRI) - UMR 5800*
bordeaux.institutionUniversité de Bordeaux
bordeaux.institutionBordeaux INP
bordeaux.institutionCNRS
bordeaux.conference.title9th ACS/IEEE International Conference on Computer Systems and Applications (AICCSA 11)
bordeaux.countryEG
bordeaux.conference.citySharm El-Sheikh
bordeaux.peerReviewedoui
hal.identifierhal-00654193
hal.version1
hal.invitednon
hal.proceedingsoui
hal.conference.end2011-06-30
hal.popularnon
hal.audienceInternationale
hal.origin.linkhttps://hal.archives-ouvertes.fr//hal-00654193v1
bordeaux.COinSctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.date=2011-06&rft.au=AGULLO,%20Emmanuel&AUGONNET,%20C%C3%A9dric&DONGARRA,%20Jack&FAVERGE,%20Mathieu&LANGOU,%20Julien&rft.genre=unknown


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