BEOL Thermal Resistance Extraction in SiGe HBTs
| dc.rights.license | open | en_US |
| dc.contributor.author | NIDHIN, K. | |
| dc.contributor.author | BALANETHIRAM, Suresh | |
| dc.contributor.author | NAIR, Deleep | |
| dc.contributor.author | D'ESPOSITO, Rosario | |
| dc.contributor.author | MOHAPATRA, Nihar | |
| hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
| dc.contributor.author | FREGONESE, Sebastien | |
| hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
| dc.contributor.author | ZIMMER, Thomas
IDREF: 076632598 | |
| dc.contributor.author | CHAKRAVORTY, Anjan | |
| dc.date.accessioned | 2023-02-27T11:10:20Z | |
| dc.date.available | 2023-02-27T11:10:20Z | |
| dc.date.issued | 2022-10-27 | |
| dc.identifier.issn | 0018-9383 | en_US |
| dc.identifier.uri | https://oskar-bordeaux.fr/handle/20.500.12278/172104 | |
| dc.description.abstractEn | A prior estimate of the impact of thermal resistance from the back-end-of-line (BEOL) metallization layers is crucial for an accurate circuit design and thermally aware device design. This paper presents a robust technique to extract the thermal resistance component originating from the BEOL metal layers in silicon germanium heterojunction bipolar transistors (SiGe HBTs). The proposed technique is first tested on data generated using analytical equations and later validated with 3D TCAD simulation. The results clearly show that the exact contribution of the BEOL to the overall thermal resistance is captured in the proposed approach. Finally, we verified the method using measured data obtained from fabricated SiGe HBT structures using Infineon B11HFC technology. The extracted parameters show reasonable accuracy and consistency across different emitter dimensions and BEOL configurations. | |
| dc.language.iso | EN | en_US |
| dc.subject.en | SiGe HBTs | |
| dc.subject.en | self heating | |
| dc.subject.en | thermal resistance | |
| dc.subject.en | back-end-of-line (BEOL) | |
| dc.subject.en | parameter extraction | |
| dc.subject.en | compact models | |
| dc.title.en | BEOL Thermal Resistance Extraction in SiGe HBTs | |
| dc.type | Article de revue | en_US |
| dc.identifier.doi | 10.1109/TED.2022.3215715 | en_US |
| dc.subject.hal | Sciences de l'ingénieur [physics] | en_US |
| bordeaux.journal | IEEE Transactions on Electron Devices | en_US |
| bordeaux.page | 6541-6546 | en_US |
| bordeaux.volume | 69 | en_US |
| bordeaux.hal.laboratories | IMS : Laboratoire de l'Intégration du Matériau au Système - UMR 5218 | en_US |
| bordeaux.issue | 12 | en_US |
| bordeaux.institution | Université de Bordeaux | en_US |
| bordeaux.institution | Bordeaux INP | en_US |
| bordeaux.institution | CNRS | en_US |
| bordeaux.peerReviewed | oui | en_US |
| bordeaux.inpress | non | en_US |
| bordeaux.import.source | hal | |
| hal.identifier | hal-03846371 | |
| hal.version | 1 | |
| hal.export | false | |
| workflow.import.source | hal | |
| dc.rights.cc | Pas de Licence CC | en_US |
| bordeaux.COinS | ctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.jtitle=IEEE%20Transactions%20on%20Electron%20Devices&rft.date=2022-10-27&rft.volume=69&rft.issue=12&rft.spage=6541-6546&rft.epage=6541-6546&rft.eissn=0018-9383&rft.issn=0018-9383&rft.au=NIDHIN,%20K.&BALANETHIRAM,%20Suresh&NAIR,%20Deleep&D'ESPOSITO,%20Rosario&MOHAPATRA,%20Nihar&rft.genre=article |
