28-nm FD-SOI CMOS Submilliwatt Ring Oscillator-Based Dual-Loop Integer-N PLL for 2.4-GHz Internet-of-Things Applications
dc.rights.license | open | en_US |
dc.contributor.author | GAIDIOZ, David | |
dc.contributor.author | CATHELIN, Andreia | |
hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
dc.contributor.author | DEVAL, Yann | |
dc.date.accessioned | 2022-07-13T07:53:34Z | |
dc.date.available | 2022-07-13T07:53:34Z | |
dc.date.issued | 2022-04 | |
dc.identifier.issn | 0018-9480 | en_US |
dc.identifier.uri | oai:crossref.org:10.1109/tmtt.2022.3149826 | |
dc.identifier.uri | https://oskar-bordeaux.fr/handle/20.500.12278/140456 | |
dc.description.abstractEn | This article presents a 2.4-GHz low-power compact integer- N ring oscillator-based phase-locked loop (PLL) for Internet of Things (IoT) applications. The proposed integer- N PLL is based on a dual loop Offset-PLL topology to achieve a fine frequency resolution similar to conventional fractional- N PLL. Not using a delta-sigma modulator (DSM) allows an expanded PLL bandwidth without deteriorating the overall noise performance. Implemented in 28 nm CMOS fully depleted silicon on insulator (FD-SOI) technology, the proposed architecture requires a 22-MHz internal reference frequency while achieving a 2-MHz frequency resolution and a 3-MHz PLL bandwidth. Measured prototypes perform −43.9 dBc reference spur, as an average value over all the bluetooth low energy (BLE) band and numerous tested dies, a jitter Figure-of-Merit of −229.6 dB for a power consumption of 0.87 mW and a core area of 0.0256 mm2. | |
dc.language.iso | EN | en_US |
dc.source | crossref | |
dc.subject.en | Dual-loop phase-locked loop (PLL) architecture | |
dc.subject.en | Internet of Things (IoT) | |
dc.subject.en | PLLs | |
dc.subject.en | ring oscillators (ROs) | |
dc.subject.en | ultralow-power (ULP) frequency synthesizer | |
dc.title.en | 28-nm FD-SOI CMOS Submilliwatt Ring Oscillator-Based Dual-Loop Integer-N PLL for 2.4-GHz Internet-of-Things Applications | |
dc.type | Article de revue | en_US |
dc.identifier.doi | 10.1109/tmtt.2022.3149826 | en_US |
dc.subject.hal | Sciences de l'ingénieur [physics]/Micro et nanotechnologies/Microélectronique | en_US |
bordeaux.journal | IEEE Transactions on Microwave Theory and Techniques | en_US |
bordeaux.page | 2207-2216 | en_US |
bordeaux.volume | 70 | en_US |
bordeaux.hal.laboratories | Laboratoire d’Intégration du Matériau au Système (IMS) - UMR 5218 | en_US |
bordeaux.issue | 4 | en_US |
bordeaux.institution | Université de Bordeaux | en_US |
bordeaux.institution | Bordeaux INP | en_US |
bordeaux.institution | CNRS | en_US |
bordeaux.peerReviewed | oui | en_US |
bordeaux.inpress | non | en_US |
bordeaux.import.source | dissemin | |
hal.export | false | |
workflow.import.source | dissemin | |
dc.rights.cc | Pas de Licence CC | en_US |
bordeaux.COinS | ctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.jtitle=IEEE%20Transactions%20on%20Microwave%20Theory%20and%20Techniques&rft.date=2022-04&rft.volume=70&rft.issue=4&rft.spage=2207-2216&rft.epage=2207-2216&rft.eissn=0018-9480&rft.issn=0018-9480&rft.au=GAIDIOZ,%20David&CATHELIN,%20Andreia&DEVAL,%20Yann&rft.genre=article |
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