Extraction of small-signal equivalent circuit for de-embedding of 3D vertical nanowire transistor
dc.rights.license | open | en_US |
dc.contributor.author | NECKEL WESLING, Bruno | |
hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
dc.contributor.author | DENG, Marina
IDREF: 184622409 | |
hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
dc.contributor.author | MUKHERJEE, Chhandak | |
hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
dc.contributor.author | DE MATOS, Magali | |
dc.contributor.author | KUMAR, Abhishek | |
dc.contributor.author | LARRIEU, Guilhem | |
dc.contributor.author | TROMMER, Jens | |
dc.contributor.author | MIKOLAJICK, Thomas | |
hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
dc.contributor.author | MANEUX, Cristell
IDREF: 135213584 | |
dc.date.accessioned | 2022-06-28T09:57:12Z | |
dc.date.available | 2022-06-28T09:57:12Z | |
dc.date.issued | 2022-08 | |
dc.identifier.issn | 0038-1101 | en_US |
dc.identifier.uri | oai:crossref.org:10.1016/j.sse.2022.108359 | |
dc.identifier.uri | https://oskar-bordeaux.fr/handle/20.500.12278/140318 | |
dc.description.abstractEn | In this paper, we present an improved methodology to extract the small-signal electrical equivalent circuit of the parasitic elements using RF test structures for a 3D vertical nanowire transistor technology. The methodology is based on the extraction of the distributed parasitic elements from an open structure for which on-wafer S-parameter measurements were carried out up to 40 GHz. The electrical equivalent circuit of the passive device was then used for de-embedding of the transistor S-parameters for extraction of intrinsic smallsignal parameters such as the gate capacitances. | |
dc.language.iso | EN | en_US |
dc.source | crossref | |
dc.subject.en | Test structure | |
dc.subject.en | Equivalent circuit | |
dc.subject.en | Parasitic components | |
dc.subject.en | RF measurements | |
dc.subject.en | De-embedding | |
dc.title.en | Extraction of small-signal equivalent circuit for de-embedding of 3D vertical nanowire transistor | |
dc.type | Article de revue | en_US |
dc.identifier.doi | 10.1016/j.sse.2022.108359 | en_US |
dc.subject.hal | Sciences de l'ingénieur [physics]/Micro et nanotechnologies/Microélectronique | en_US |
bordeaux.journal | Solid-State Electronics | en_US |
bordeaux.page | 108359 | en_US |
bordeaux.volume | 194 | en_US |
bordeaux.hal.laboratories | Laboratoire d’Intégration du Matériau au Système (IMS) - UMR 5218 | en_US |
bordeaux.institution | Université de Bordeaux | en_US |
bordeaux.institution | Bordeaux INP | en_US |
bordeaux.institution | CNRS | en_US |
bordeaux.peerReviewed | oui | en_US |
bordeaux.inpress | non | en_US |
bordeaux.import.source | dissemin | |
hal.export | false | |
workflow.import.source | dissemin | |
dc.rights.cc | Pas de Licence CC | en_US |
bordeaux.COinS | ctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.jtitle=Solid-State%20Electronics&rft.date=2022-08&rft.volume=194&rft.spage=108359&rft.epage=108359&rft.eissn=0038-1101&rft.issn=0038-1101&rft.au=NECKEL%20WESLING,%20Bruno&DENG,%20Marina&MUKHERJEE,%20Chhandak&DE%20MATOS,%20Magali&KUMAR,%20Abhishek&rft.genre=article |
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