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A 860mV and 73.5Ppm/°C Voltage Reference that Relies on Back-Gate Biasing Techniques in 28nm FD-SOI Technology

dc.rights.licenseopenen_US
hal.structure.identifierLaboratoire de l'intégration, du matériau au système [IMS]
dc.contributor.authorGUILLOT, Maxime
hal.structure.identifierLaboratoire de l'intégration, du matériau au système [IMS]
dc.contributor.authorDEVAL, Yann
hal.structure.identifierLaboratoire de l'intégration, du matériau au système [IMS]
dc.contributor.authorLAPUYADE, Herve
IDREF: 120393336
hal.structure.identifierLaboratoire de l'intégration, du matériau au système [IMS]
dc.contributor.authorRIVET, François
dc.date.accessioned2025-02-13T13:25:07Z
dc.date.available2025-02-13T13:25:07Z
dc.date.issued2025-01-28
dc.date.conference2024-11-18
dc.identifier.issn2473-2001en_US
dc.identifier.urihttps://oskar-bordeaux.fr/handle/20.500.12278/204850
dc.description.abstractEnThis paper discusses the development of a new topology voltage reference in Fully Depleted Silicon-On-Insulator (FD-SOI) technology. The voltage reference described in this paper is based on threshold voltage subtraction techniques, PTAT and CTAT voltage addition and transistor's back-gate biasing in 28nm FD-SOI technology. It has a 860mV output and achieves a performance of 73.5ppm/°C (T=-50°C to 150°C) under a supply voltage of 1V.
dc.language.isoENen_US
dc.publisherIEEEen_US
dc.subjectTemperature dependence
dc.subjectTemperature distribution
dc.subjectSubtraction techniques
dc.subjectLayout
dc.subjectSilicon-on-insulator
dc.subjectAerospace electronics
dc.subjectThreshold voltage
dc.subjectTopology
dc.subjectTransistors
dc.subjectElectronic circuits
dc.subjectVoltage reference
dc.subjectPTAT
dc.subjectCTAT
dc.subjectBack-Gate biasing
dc.subjectThermal dependency
dc.subjectFD-SOI
dc.title.enA 860mV and 73.5Ppm/°C Voltage Reference that Relies on Back-Gate Biasing Techniques in 28nm FD-SOI Technology
dc.typeCommunication dans un congrèsen_US
dc.identifier.doi10.1109/icecs61496.2024.10849174en_US
dc.subject.halSciences de l'ingénieur [physics]en_US
bordeaux.page1-4en_US
bordeaux.hal.laboratoriesIMS : Laboratoire de l'Intégration du Matériau au Système - UMR 5218en_US
bordeaux.institutionUniversité de Bordeauxen_US
bordeaux.institutionBordeaux INPen_US
bordeaux.institutionCNRSen_US
bordeaux.conference.title2024 31st IEEE International Conference on Electronics, Circuits and Systems (ICECS)en_US
bordeaux.countryfren_US
bordeaux.title.proceeding2024 31st IEEE International Conference on Electronics, Circuits and Systems (ICECS)en_US
bordeaux.teamCIRCUIT DESIGN-CASen_US
bordeaux.conference.cityNancyen_US
bordeaux.import.sourcecrossref
hal.identifierhal-04945900
hal.version1
hal.date.transferred2025-02-13T13:25:10Z
hal.proceedingsouien_US
hal.conference.end2024-11-20
hal.popularnonen_US
hal.audienceInternationaleen_US
hal.exporttrue
workflow.import.sourcecrossref
dc.rights.ccPas de Licence CCen_US
bordeaux.COinSctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.date=2025-01-28&rft.spage=1-4&rft.epage=1-4&rft.eissn=2473-2001&rft.issn=2473-2001&rft.au=GUILLOT,%20Maxime&DEVAL,%20Yann&LAPUYADE,%20Herve&RIVET,%20Fran%C3%A7ois&rft.genre=unknown


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