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hal.structure.identifierSchool of Global Information and Telecommunication Studies [Waseda] [GITS]
dc.contributor.authorGHATPANDE, Abhay
hal.structure.identifierSchool of Global Information and Telecommunication Studies [Waseda] [GITS]
dc.contributor.authorNAKAZATO, Hidenori
hal.structure.identifierLaboratoire Bordelais de Recherche en Informatique [LaBRI]
hal.structure.identifierAlgorithmics for computationally intensive applications over wide scale distributed platforms [CEPAGE]
dc.contributor.authorBEAUMONT, Olivier
hal.structure.identifierSchool of Global Information and Telecommunication Studies [Waseda] [GITS]
dc.contributor.authorWATANABE, Hiroshi
dc.date.accessioned2024-04-15T09:53:58Z
dc.date.available2024-04-15T09:53:58Z
dc.date.issued2008
dc.identifier.issn0916-8516
dc.identifier.urihttps://oskar-bordeaux.fr/handle/20.500.12278/198641
dc.description.abstractEnDivisible Load Theory (DLT) is an established mathematical framework to study Divisible Load Scheduling (DLS). However, traditional DLT does not address the scheduling of results back to source (i.e., result collection), nor does it comprehensively deal with system heterogeneity. In this paper, the the DLSRCHETS (DLS with Result Collection on Heterogeneous Systems) problem is addressed. The few papers to date that have dealt with DLSRCHETS, proposed simplistic LIFO (Last In, First Out) and FIFO (First In, First Out) type of schedules as solutions to DLSRCHETS. In this paper, a new polynomial time heuristic algorithm, SPORT, is proposed as a solution to the DLSRCHETS problem. With the help of simulations, it is proved that the performance of SPORT is significantly better than existing algorithms. The other major contributions of this paper include, for the first time ever, (a) the derivation of the condition to identify the presence of idle time in a FIFO schedule for two processors, (b) the identification of the limiting condition for the optimality of FIFO and LIFO schedules for two processors, and (c) the introduction of the concept of equivalent processor in DLS for heterogeneous systems with result collection.
dc.description.sponsorshipALgorithmique des Plates-formes A Grande Echelle - ANR-05-MMSA-0006
dc.language.isoen
dc.publisherInstitute of Electronics, Information and Communication Engineers
dc.title.enSPORT: An Algorithm for Divisible Load Scheduling with Result Collection on Heterogeneous Systems
dc.typeArticle de revue
dc.subject.halInformatique [cs]/Calcul parallèle, distribué et partagé [cs.DC]
bordeaux.journalIEICE Transactions on Communications
bordeaux.hal.laboratoriesLaboratoire Bordelais de Recherche en Informatique (LaBRI) - UMR 5800*
bordeaux.institutionUniversité de Bordeaux
bordeaux.institutionBordeaux INP
bordeaux.institutionCNRS
bordeaux.peerReviewedoui
hal.identifierinria-00336212
hal.version1
hal.popularnon
hal.audienceInternationale
hal.origin.linkhttps://hal.archives-ouvertes.fr//inria-00336212v1
bordeaux.COinSctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.jtitle=IEICE%20Transactions%20on%20Communications&rft.date=2008&rft.eissn=0916-8516&rft.issn=0916-8516&rft.au=GHATPANDE,%20Abhay&NAKAZATO,%20Hidenori&BEAUMONT,%20Olivier&WATANABE,%20Hiroshi&rft.genre=article


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