A NUMA Aware Scheduler for a Parallel Sparse Direct Solver
| hal.structure.identifier | Innovative Computing Laboratory [Knoxville] [ICL] | |
| dc.contributor.author | FAVERGE, Mathieu | |
| hal.structure.identifier | Parallel tools for Numerical Algorithms and Resolution of essentially Hyperbolic problems [BACCHUS] | |
| dc.contributor.author | LACOSTE, Xavier | |
| hal.structure.identifier | Parallel tools for Numerical Algorithms and Resolution of essentially Hyperbolic problems [BACCHUS] | |
| hal.structure.identifier | Laboratoire Bordelais de Recherche en Informatique [LaBRI] | |
| dc.contributor.author | RAMET, Pierre | |
| dc.date.accessioned | 2024-04-15T09:48:05Z | |
| dc.date.available | 2024-04-15T09:48:05Z | |
| dc.date.created | 2010-05-10 | |
| dc.date.issued | 2010-05-10 | |
| dc.identifier.uri | https://oskar-bordeaux.fr/handle/20.500.12278/198150 | |
| dc.description.abstractEn | Over the past few years, parallel sparse direct solvers made significant progress and are now able to solve efficiently industrial three-dimensional problems with several millions of unknowns. To solve efficiently these problems, PaStiX and WSMP solvers for example, provide an hybrid MPI-thread implementation well suited for SMP nodes or multi-core architectures. It enables to drastically reduce the memory overhead of the factorization and improve the scalability of the algorithms. However, today's modern architectures introduce new hierarchical memory accesses that are not handle in these solvers. We present in this paper three improvements on PaStiX solver to improve the performance on modern architectures : memory allocation, communication overlap and dynamic scheduling and some results on numerical test cases will be presented to prove the efficiency of the approach on NUMA architectures. | |
| dc.description.sponsorship | Adaptation et Optimisation des Performances Applicatives sur architectures NUMA. Etude et Mise en Œuvre sur des Applications en SISmologie. - ANR-05-CIGC-0002 | |
| dc.language.iso | en | |
| dc.subject.en | sparse direct solver | |
| dc.subject.en | NUMA architecture | |
| dc.subject.en | multi-cores | |
| dc.subject.en | dynamic scheduling | |
| dc.title.en | A NUMA Aware Scheduler for a Parallel Sparse Direct Solver | |
| dc.type | Rapport | |
| dc.subject.hal | Informatique [cs]/Calcul parallèle, distribué et partagé [cs.DC] | |
| bordeaux.page | 22 | |
| bordeaux.hal.laboratories | Laboratoire Bordelais de Recherche en Informatique (LaBRI) - UMR 5800 | * |
| bordeaux.institution | Université de Bordeaux | |
| bordeaux.institution | Bordeaux INP | |
| bordeaux.institution | CNRS | |
| bordeaux.type.institution | INRIA | |
| bordeaux.type.report | rr | |
| hal.identifier | inria-00549827 | |
| hal.version | 1 | |
| hal.audience | Non spécifiée | |
| hal.origin.link | https://hal.archives-ouvertes.fr//inria-00549827v1 | |
| bordeaux.COinS | ctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.date=2010-05-10&rft.spage=22&rft.epage=22&rft.au=FAVERGE,%20Mathieu&LACOSTE,%20Xavier&RAMET,%20Pierre&rft.genre=unknown |
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