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Analysis of MPI Shared-Memory Communication Performance from a Cache Coherence Perspective

hal.structure.identifierEfficient runtime systems for parallel architectures [RUNTIME]
hal.structure.identifierLaboratoire Bordelais de Recherche en Informatique [LaBRI]
dc.contributor.authorPUTIGNY, Bertrand
hal.structure.identifierEfficient runtime systems for parallel architectures [RUNTIME]
dc.contributor.authorRUELLE, Benoit
hal.structure.identifierEfficient runtime systems for parallel architectures [RUNTIME]
hal.structure.identifierLaboratoire Bordelais de Recherche en Informatique [LaBRI]
dc.contributor.authorGOGLIN, Brice
dc.date.accessioned2024-04-15T09:41:39Z
dc.date.available2024-04-15T09:41:39Z
dc.date.created2013-11-01
dc.date.issued2014-05
dc.date.conference2014-05-23
dc.identifier.urihttps://oskar-bordeaux.fr/handle/20.500.12278/197617
dc.description.abstractEnShared memory MPI communication is an important part of the overall performance of parallel applications. However understanding the behavior of these data transfers is difficult because of the combined complexity of modern memory architectures with multiple levels of caches and complex cache coherence protocols, of MPI implementations, and of application needs. We analyze shared memory MPI communication from a cache coherence perspective through a new memory model. It captures the memory architecture characteristics with microbenchmarks that exhibit the limitations of the memory accesses involved in the data transfer. We model the performance of intra-node communication without requiring complex analytical models. The advantage of the approach consists in not requiring deep knowledge of rarely documented hardware features such as caching policies or prefetchers that make modeling modern memory subsystems hardly feasible. Our qualitative analysis based on this result leads to a better understanding of shared memory communication performance for scientific computing. We then discuss some possible optimizations such as buffer reuse order, cache flushing, and non-temporal instructions that could be used by MPI implementers.
dc.language.isoen
dc.publisherIEEE
dc.title.enAnalysis of MPI Shared-Memory Communication Performance from a Cache Coherence Perspective
dc.typeCommunication dans un congrès
dc.identifier.doi10.1109/IPDPSW.2014.139
dc.subject.halInformatique [cs]/Système d'exploitation [cs.OS]
bordeaux.hal.laboratoriesLaboratoire Bordelais de Recherche en Informatique (LaBRI) - UMR 5800*
bordeaux.institutionUniversité de Bordeaux
bordeaux.institutionBordeaux INP
bordeaux.institutionCNRS
bordeaux.conference.titlePDSEC - The 15th IEEE International Workshop on Parallel and Distributed Scientific and Engineering Computing, held in conjunction with IPDPS
bordeaux.countryUS
bordeaux.conference.cityPhoenix, AZ
bordeaux.peerReviewedoui
hal.identifierhal-00956307
hal.version1
hal.invitednon
hal.proceedingsoui
hal.popularnon
hal.audienceInternationale
hal.origin.linkhttps://hal.archives-ouvertes.fr//hal-00956307v1
bordeaux.COinSctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.date=2014-05&rft.au=PUTIGNY,%20Bertrand&RUELLE,%20Benoit&GOGLIN,%20Brice&rft.genre=unknown


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