Architectural optimisation for microelectronic packaging
| hal.structure.identifier | Laboratoire d'ingénierie pour les systèmes complexes [UR LISC] | |
| dc.contributor.author | MATHIAS, Jean-Denis | |
| hal.structure.identifier | Axe 1 : procédés céramiques | |
| dc.contributor.author | GEFFROY, Pierre-Marie | |
| hal.structure.identifier | Institut de Chimie de la Matière Condensée de Bordeaux [ICMCB] | |
| dc.contributor.author | SILVAIN, Jean-François | |
| dc.date.created | 2008-03-03 | |
| dc.date.issued | 2009-03-25 | |
| dc.identifier.issn | 1359-4311 | |
| dc.description.abstractEn | The aim of this paper is to provide a methodical approach for architectural optimization of power microelectronic devices. Because critical parameters of electronic devices are linked with reliability, architectural optimisation, selection of the geometrical parameters of device and optimization of these parameters by iteration method associated by numerical analysis of reliability have to be achieved. In this way, this paper discusses about a methodical and numerical approach for the optimization of reliability in electronic devices, in particular the influence of geometrical parameters on the device reliability. | |
| dc.language.iso | en | |
| dc.publisher | Elsevier | |
| dc.subject.en | Physical Sciences | |
| dc.title.en | Architectural optimisation for microelectronic packaging | |
| dc.type | Article de revue | |
| dc.identifier.doi | 10.1016/j.applthermaleng.2008.12.037 | |
| dc.subject.hal | Chimie/Matériaux | |
| bordeaux.journal | Applied Thermal Engineering | |
| bordeaux.page | 2391-2395 | |
| bordeaux.volume | 29 | |
| bordeaux.issue | 11-12 | |
| bordeaux.peerReviewed | oui | |
| hal.identifier | hal-00521088 | |
| hal.version | 1 | |
| hal.popular | non | |
| hal.audience | Internationale | |
| hal.origin.link | https://hal.archives-ouvertes.fr//hal-00521088v1 | |
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