Methodology for data retrieval of MRAM: Technological analysis, sample preparation and internal electrical measurements
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EN
Article de revue
Este ítem está publicado en
Microelectronic Engineering. 2025-09, vol. 299, p. 112351
Resumen en inglés
This paper presents the methodology to be applied in order to achieve the data retrieval of any magneto-resistive random access memory (MRAM) on the market, whether it's a Toggle MRAM or a STT-MRAM. This methodology consists ...Leer más >
This paper presents the methodology to be applied in order to achieve the data retrieval of any magneto-resistive random access memory (MRAM) on the market, whether it's a Toggle MRAM or a STT-MRAM. This methodology consists of four stages: theoretical study of the structure, technological analysis to identify the physical structure of the memory, preparation of the memory to make the data accessible, and readout of those data.
Knowing the structural elements and how the MRAM is read/written allows the possibility to do its technological analysis. Then, this analysis allows the identification of the magnetic tunnel junction (MTJ), where the data (‘0’ / ‘1’) is stored as resistance states, and of its surroundings, mainly the bitline. Once this is done, a complex preparation of the device's backside is achieved to expose both sides of the MTJ: one side to apply the voltage and the other to collect the current. The sample preparation methodology consists of a chemical opening, a polishing down to the transistors, focused ion beam (FIB) etches of metallization levels surrounding the MTJ and metal deposition. Finally, the memory can be read by techniques derived from atomic force microscopy (AFM). For both memory types, the discrimination of the bit states is proved by conductive AFM (C-AFM).
This work demonstrates that it is possible to retrieve data stored in a Toggle MRAM (130 nm technology node) and in a STT-MRAM (40 nm technology node) using invasive techniques. These components thus represent the two types of MRAM on the market, with classical and more advanced technology nodes. The data readout validates the sample preparation flow.< Leer menos
Palabras clave en inglés
Hardware
Integrated circuits
Semiconductor memory
Centros de investigación