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dc.rights.licenseopenen_US
hal.structure.identifierLaboratoire de l'intégration, du matériau au système [IMS]
dc.contributor.authorVERT, Dorian
dc.contributor.authorPIGNOL, Michel
dc.contributor.authorLEBRE, Vincent
dc.contributor.authorMOUTAYE, Emmanuel
dc.contributor.authorMALOU, Florence
hal.structure.identifierLaboratoire de l'intégration, du matériau au système [IMS]
dc.contributor.authorBEGUERET, Jean-Baptiste
dc.date.accessioned2023-03-14T08:37:43Z
dc.date.available2023-03-14T08:37:43Z
dc.date.issued2022-11-03
dc.identifier.issn2079-9292en_US
dc.identifier.urihttps://oskar-bordeaux.fr/handle/20.500.12278/172286
dc.description.abstractEnAn injection-locked ring oscillator-based phase-locked-loop targeting clock recovery for space application at 3.2 GHz is presented here. Most clock recovery circuits need a very low phase noise and jitter performance and are thus based on LC-type oscillators. These excellent performances come at the expense of a very poor integration density. To alleviate this issue, this work introduces an injection-locked ring oscillator-based PLL circuit. The combination of the injection-locking process with the use of ring oscillators allows for the benefit of excellent jitter performance while presenting an extremely low surface area due to an architecture without any inductor. The injection locking principle is addressed, and evidence of its phase noise and jitter improvements are confirmed through measurement results. Indeed, phase noise and jitter enhancements up to 43 dB and 23.3 mUI, respectively, were measured. As intended, this work shows the best integration density compared to recent similar state-of-the-art studies. The whole architecture measures 0.1 mm2 while consuming 34.6 mW in a low-cost 180 nm CMOS technology.
dc.language.isoENen_US
dc.rightsAttribution 3.0 United States*
dc.rights.urihttp://creativecommons.org/licenses/by/3.0/us/*
dc.subjectInjection locking
dc.subjectRing oscillator
dc.subjectPhase-locked-loop
dc.subjectClock recovery
dc.title.enA 3.2 GHz Injection-Locked Ring Oscillator-Based Phase-Locked-Loop for Clock Recovery
dc.typeArticle de revueen_US
dc.identifier.doi10.3390/electronics11213590en_US
dc.subject.halSciences de l'ingénieur [physics]en_US
bordeaux.journalElectronicsen_US
bordeaux.page3590en_US
bordeaux.volume11en_US
bordeaux.hal.laboratoriesIMS : Laboratoire de l'Intégration du Matériau au Système - UMR 5218en_US
bordeaux.issue21en_US
bordeaux.institutionUniversité de Bordeauxen_US
bordeaux.institutionBordeaux INPen_US
bordeaux.institutionCNRSen_US
bordeaux.teamCONCEPTION-CSNen_US
bordeaux.peerReviewedouien_US
bordeaux.inpressnonen_US
hal.identifierhal-04027855
hal.version1
hal.date.transferred2023-03-14T08:37:53Z
hal.exporttrue
dc.rights.ccCC BYen_US
bordeaux.COinSctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.jtitle=Electronics&rft.date=2022-11-03&rft.volume=11&rft.issue=21&rft.spage=3590&rft.epage=3590&rft.eissn=2079-9292&rft.issn=2079-9292&rft.au=VERT,%20Dorian&PIGNOL,%20Michel&LEBRE,%20Vincent&MOUTAYE,%20Emmanuel&MALOU,%20Florence&rft.genre=article


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