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dc.rights.licenseopenen_US
dc.contributor.authorGUPTA, Aakashdeep
dc.contributor.authorNIDHIN, K.
dc.contributor.authorBALANETHIRAM, Suresh
dc.contributor.authorYADAV, Shon
hal.structure.identifierLaboratoire de l'intégration, du matériau au système [IMS]
dc.contributor.authorFREGONESE, Sebastien
hal.structure.identifierLaboratoire de l'intégration, du matériau au système [IMS]
dc.contributor.authorZIMMER, Thomas
IDREF: 076632598
dc.contributor.authorCHAKRAVORTY, Anjan
dc.date.accessioned2023-02-27T10:54:52Z
dc.date.available2023-02-27T10:54:52Z
dc.date.issued2022-10-28
dc.identifier.issn0018-9383, 1557-9646en_US
dc.identifier.urihttps://oskar-bordeaux.fr/handle/20.500.12278/172102
dc.description.abstractEnWe present a compact modeling framework to optimize finger spacing for improving the thermal stability in multi-finger bipolar transistors with shallow-trench isolation. First, we present an accurate physics-based model for total junction temperature in all the fingers of a transistor. Other than validating the model with 3D TCAD simulations and measured data, we demonstrate its efficacy to achieve finger spacing optimization with the aid of an iterative algorithm. Since the proposed technique is scalable from the viewpoint of the number of fingers within a transistor and their geometries, the proposed framework is found to work seamlessly for various emitter finger numbers.
dc.language.isoENen_US
dc.subject.enSiGe HBT
dc.subject.enmulti-finger transistor
dc.subject.enfinger placement
dc.subject.enself-heating
dc.subject.enthermal coupling
dc.subject.enshallow trench isolation
dc.subject.enKirchhoff's transformation
dc.title.enOptimizing Finger Spacing in Multi-Finger Bipolar Transistors for Minimal Electrothermal Coupling
dc.typeArticle de revueen_US
dc.identifier.doi10.1109/TED.2022.3215801en_US
dc.subject.halSciences de l'ingénieur [physics]en_US
bordeaux.journalIEEE Transactions on Electron Devicesen_US
bordeaux.page6535-6540en_US
bordeaux.volume69en_US
bordeaux.hal.laboratoriesIMS : Laboratoire de l'Intégration du Matériau au Système - UMR 5218en_US
bordeaux.issue12en_US
bordeaux.institutionUniversité de Bordeauxen_US
bordeaux.institutionBordeaux INPen_US
bordeaux.institutionCNRSen_US
bordeaux.peerReviewedouien_US
bordeaux.inpressnonen_US
bordeaux.import.sourcehal
hal.identifierhal-03846331
hal.version1
hal.exportfalse
workflow.import.sourcehal
dc.rights.ccPas de Licence CCen_US
bordeaux.COinSctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.jtitle=IEEE%20Transactions%20on%20Electron%20Devices&rft.date=2022-10-28&rft.volume=69&rft.issue=12&rft.spage=6535-6540&rft.epage=6535-6540&rft.eissn=0018-9383,%201557-9646&rft.issn=0018-9383,%201557-9646&rft.au=GUPTA,%20Aakashdeep&NIDHIN,%20K.&BALANETHIRAM,%20Suresh&YADAV,%20Shon&FREGONESE,%20Sebastien&rft.genre=article


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