Low Consumption Balanced Front-end Amplifiers Robust to Load Variations in 65nm PD-SOI CMOS Technology for 60 GHz Shortrange Wireless Applications
| dc.rights.license | open | en_US |
| hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
| dc.contributor.author | BERTHIER, Alexandre | |
| hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
| dc.contributor.author | GHIOTTO, Anthony | |
| hal.structure.identifier | Laboratoire de l'intégration, du matériau au système [IMS] | |
| dc.contributor.author | KERHERVE, Eric | |
| dc.contributor.author | VOGT, Lionel | |
| dc.date.accessioned | 2022-08-29T12:29:56Z | |
| dc.date.available | 2022-08-29T12:29:56Z | |
| dc.date.issued | 2022-01-01 | |
| dc.identifier.issn | 1549-7747 | en_US |
| dc.identifier.uri | oai:crossref.org:10.1109/tcsii.2022.3185552 | |
| dc.identifier.uri | https://oskar-bordeaux.fr/handle/20.500.12278/140611 | |
| dc.description.abstractEn | This paper presents two low consumption balanced front-end amplifiers designed in 65nm PD-SOI CMOS technology dedicated to low output power 60 GHz short-range wireless applications. For both designs, a resistive feedback neutralized common source differential pair architecture is used with 90∘ twisted hybrid couplers which allows power combining in addition to an improved robustness against load variations shown by load-pull experimental results. A specific design approach is used to reduce power consumption and limit the output power level. The one-stage amplifier exhibits a gain of 5.43 dB, an OCP1dB of 4.5 dBm, a saturated power superior to 6.33 dBm and a peak PAE of 8.6 % for a total power consumption of solely 14 mW and an active area of 0.17 mm2. The three-stage amplifier exhibits a gain of 21 dB, an OCP1dB of 3.7 dBm, a Psat of 7 dBm and a peak PAE of 8.4 % under a total power consumption of only 42 mW and an active area of 0.3 mm2. All the reported performances are obtained at 60 GHz from a 1V supply voltage. | |
| dc.language.iso | EN | en_US |
| dc.source | crossref | |
| dc.subject.en | balanced amplifiers | |
| dc.subject.en | CMOS | |
| dc.subject.en | load variations | |
| dc.subject.en | low consumption | |
| dc.subject.en | short-range communications | |
| dc.subject.en | wireless | |
| dc.title.en | Low Consumption Balanced Front-end Amplifiers Robust to Load Variations in 65nm PD-SOI CMOS Technology for 60 GHz Shortrange Wireless Applications | |
| dc.type | Article de revue | en_US |
| dc.identifier.doi | 10.1109/tcsii.2022.3185552 | en_US |
| dc.subject.hal | Sciences de l'ingénieur [physics]/Micro et nanotechnologies/Microélectronique | en_US |
| bordeaux.journal | IEEE Transactions on Circuits and Systems II: Express Briefs | en_US |
| bordeaux.page | 1-1 | en_US |
| bordeaux.hal.laboratories | Laboratoire d’Intégration du Matériau au Système (IMS) - UMR 5218 | en_US |
| bordeaux.institution | Université de Bordeaux | en_US |
| bordeaux.institution | Bordeaux INP | en_US |
| bordeaux.institution | CNRS | en_US |
| bordeaux.peerReviewed | oui | en_US |
| bordeaux.inpress | non | en_US |
| bordeaux.import.source | dissemin | |
| hal.identifier | hal-03763357 | |
| hal.version | 1 | |
| hal.date.transferred | 2022-08-29T12:29:58Z | |
| hal.export | true | |
| workflow.import.source | dissemin | |
| dc.rights.cc | Pas de Licence CC | en_US |
| bordeaux.COinS | ctx_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.jtitle=IEEE%20Transactions%20on%20Circuits%20and%20Systems%20II:%20Express%20Briefs&rft.date=2022-01-01&rft.spage=1-1&rft.epage=1-1&rft.eissn=1549-7747&rft.issn=1549-7747&rft.au=BERTHIER,%20Alexandre&GHIOTTO,%20Anthony&KERHERVE,%20Eric&VOGT,%20Lionel&rft.genre=article |
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