Design of an 8GSps, 65nm CMOS Wideband Flash Analog-to-Digital Converter
Langue
en
Communication dans un congrès
Ce document a été publié dans
Design of an 8GSps, 65nm CMOS Wideband Flash Analog-to-Digital Converter, Design of an 8GSps, 65nm CMOS Wideband Flash Analog-to-Digital Converter, 2011-12-11, BEYROUTH. 2011-12-11p. 22-26
Résumé en anglais
This paper describes the design of an 8Gsps flash Analog-to-Digital Converter (ADC) for wideband radio astronomy applications. The ADC contains a track-and-hold (TAH) and a 1-to-4 demultiplexer. Our circuit has been ...Lire la suite >