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<title>OSKAR Bordeaux</title>
<link>https://oskar-bordeaux.fr:443</link>
<description>The DSpace digital repository system captures, stores, indexes, preserves, and distributes digital research material.</description>
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<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/171701"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/199538"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/199521"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/199537"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/199518"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/199520"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/199519"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/199526"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/183726"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/197376"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/167928"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/194978"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/197374"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/194984"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/97574"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/188982"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/188983"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/189124"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/189125"/>
<rdf:li rdf:resource="https://oskar-bordeaux.fr/handle/20.500.12278/140606"/>
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<dc:date>2026-04-11T02:30:22Z</dc:date>
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<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/171701">
<title>A Single Session of SMR-Neurofeedback Training Improves Selective Attention Emerging from a Dynamic Structuring of Brain–Heart Interplay</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/171701</link>
<description>BOUNY, Pierre; ARSAC, Laurent; PRATVIEL, Yvan; BOFFET, Alexis; TOURE CUQ, Emma; DESCHODT-ARSAC, Veronique
</description>
<dc:date>2022-06-17T00:00:00Z</dc:date>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/199538">
<title>Studying LF and HF time series to characterize cardiac physiological responses to mental fatigue</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/199538</link>
<description>BOFFET, Alexis; DESCHODT-ARSAC, Veronique; GRIVEL, Eric
</description>
<dc:date>2024-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/199521">
<title>Bias Temperature Instability Characterization and Modeling for 0.18um CMOS Under Extreme Thermal Stress Conditions</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/199521</link>
<description>TRAN, Yen; NOMURA, Toshihiro; CHERCHALI, Mohamed Salim; TASSIN, Claire; DEVAL, Yann; MANEUX, Cristell
We investigated the significance of 0.18um CMOS (Complementary Metal-Oxide-Semiconductor) degradation due to bias temperature instability (BTI) under extreme temperature operations (150 degC and 210 degC). The transistors have been applied dedicated DC bias and temperature conditions to investigate the wear-out mechanism in specific severe environment for oilfield applications. The aging tests have been monitored up to 1,000 hours. These results are preliminarily used to develop equations reflecting aging laws to be included in commercial software tool for further investigation at logic circuit level.
</description>
<dc:date>2021-07-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/199537">
<title>0.45-mW 2.35-3.0 GHz Multiplying DLL with Calibration Loop in 28nm CMOS FD-SOI</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/199537</link>
<description>ASPRILLA, Andres; CATHELIN, Andreia; DEVAL, Yann
This paper presents the design and measurement results of an sub-half-mW frequency synthesizer, composed of a multiplying delay-locked loop (MDLL), which reduces the phase noise of a standard ring oscillator. The proposed circuit takes advantage of the low-jitter and high loop bandwidth characteristic of the MDLLs, and has the particular feature of being able to lock to any external reference frequency between 50 and 100 MHz. It is known from the previous state-of-theart implementations that the reference spur degrades the output spectrum. In this work, an ultra-low-power spur reduction circuit is proposed to improve the spectral purity of the output spectrum, achieving -47.2dBc of spur rejection, measured for 10 chips. For 456 μW of power consumption, 2.5 ps of RMS jitter, the proposed solution presents a Figure of merit (FoM) of -235dB, being suitable for ultra-low-power IoT applications.
</description>
<dc:date>2023-09-11T00:00:00Z</dc:date>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/199518">
<title>A 5G 65-nm PD-SOI CMOS 23.2-to-28.8 GHz Low-Jitter Quadrature-Coupled Injection-Locked Digitally-Controlled Oscillator</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/199518</link>
<description>DUMONT, Romane; DE MATOS, Magali; CATHELIN, Andreia; DEVAL, Yann
A low-phase-noise mm-W low-power quadrature differentially injection-locked digitally-controlled oscillator (QILDCO) is presented. This work adopts a differential injection to enable a trade-off between phase noise performance and power consumption. Switched-capacitor banks and active devices are integrated inside the inductor loop to reduce the active area. The total active area is 0.109 mm 2 including harmonic extractors and buffers (excluding I/O pads). The proposed oscillator is supporting two 5G mm-W bands below 30 GHz with a tuning range of 21.3%. The prototype has been implemented in 65-nm Partially-Depleted SOI (PD-SOI) CMOS process. It achieves best state-of-the-art jitter of 25.6 fs while consuming 22 mW from a 1 V supply voltage.
</description>
<dc:date>2022-06-19T00:00:00Z</dc:date>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/199520">
<title>Investigation of 0.18μm CMOS Sensitivity to BTI and HCI Mechanisms under Extreme Thermal Stress Conditions</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/199520</link>
<description>TRAN, Yen; NOMURA, Toshihiro; CHERCHALI, Mohamed Salim; TASSIN, Claire; DEVAL, Yann; MANEUX, Cristell
Bias temperature instability (BTI) and hot carrier injection (HCI) are both prominent reliability concerns for integrated circuits (ICs). In this paper, we investigated these failure mechanisms on 0.18μm CMOS (Complementary Metal-Oxide-Semiconductor) submitted to severe temperatures (150°C and 210°C) for long period of stress (up to 2,000 hours). Additionally, the transistors were applied dedicated stress conditions to activate the intrinsic HCI and BTI wear-out mechanisms. The aging laws were proposed based on these experimental results and implemented into the commercial software tool for further investigation at logic circuit level.
</description>
<dc:date>2022-01-11T00:00:00Z</dc:date>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/199519">
<title>Highly Linear Large Signal Compact Voltage-to-Current Converter in 28 nm FD-SOI Technology</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/199519</link>
<description>ASPRILLA, Andres; CATHELIN, Andreia; DEVAL, Yann
This paper presents the design of a linear wide output range voltage-to-current (V2I) converter which has a constant transconductance value from a given input voltage. The proposed circuit offers a solution with a low footprint (33 μm x 24 μm) , low power consumption (34 μW) , and a transconductance variation less than 2%. In this paper, the output current is used to generate a pair of symmetrical voltages, equal in magnitude and opposite in sign, to provide the tuning of a body-controlled ring oscillator. The circuit has been designed and fabricated in 28 nm FD-SOI technology from STMicroelectronics.
</description>
<dc:date>2022-03-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/199526">
<title>From modeling and simulation to Digital Twin: evolution or revolution?</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/199526</link>
<description>From modeling and simulation to Digital Twin: evolution or revolution?
ALI, Zeeshan; BIGLARI, Raheleh; DENIL, Joachim; MERTENS, Joost; POURSOLTAN, Milad; TRAORE, Mamadou Kaba
As digitalization is permeating all sectors of society toward the concept of ‘‘smart everything,’’ and virtual technologies and data are gaining a dominant place in the engineering and control of intelligent systems, the Digital Twin (DT) concept has surfaced as one of the top technologies to adopt. This paper discusses the DT concept from the viewpoint of Modeling and Simulation (M&amp;S) experts. It both provides literature review elements and adopts a commentary-driven approach. We first examine the DT from a historical perspective, tracing the historical development of M&amp;S from its roots in computational experiments to its applications in various fields and the birth of DT-related and allied concepts. We then approach DTs as an evolution of M&amp;S, acknowledging the overlap in these different concepts. We also look at the M&amp;S workflow and its evolution toward a DT workflow from a software engineering perspective, highlighting signifi cant changes. Finally, we look at new challenges and requirements DTs entail, potentially leading to a revolutionary shift in M&amp;S practices. In this way, we hope to foster the discussion on DTs and provide the M&amp;S expert with innovative perspectives.
</description>
<dc:date>2024-03-20T00:00:00Z</dc:date>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/183726">
<title>Le cadre de l’expérience des données en éducation : gouvernance, représentations et intelligibilité des données dans l’éducation nationale</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/183726</link>
<description>Le cadre de l’expérience des données en éducation : gouvernance, représentations et intelligibilité des données dans l’éducation nationale
LEHMANS, Anne; CAPELLE, Camille
Analyse de la façon dont les acteurs de l'éducation nationale et leurs partenaires comprennent les enjeux d’organisation, de protection, de mobilisation et de médiation des données. Sur la base des premiers&#13;
résultats d’une recherche sur la culture des données, les représentations montrent les difficultés auxquelles se heurtent les acteurs face à leurs missions dans le cadre de la gouvernance des données. En cause, leur intelligibilité des données, dans la mesure où celles-ci renvoient à des objets complexes, à des normes qui sont encore en construction dans leur mise en oeuvre, et à des valeurs qui révèlent les contradictions des choix politiques en matière de gestion des données pour l’éducation.
</description>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/197376">
<title>Étude de l’effet de l’humidité sur les performances d’une antenne patch en substrat bois éco-responsable</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/197376</link>
<description>Étude de l’effet de l’humidité sur les performances d’une antenne patch en substrat bois éco-responsable
BOURRETERE, Clement; MARTINS, Valentin Lourenço; GHIOTTO, Anthony; DELETAGE, Jean-Yves
</description>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/167928">
<title>Elaboration of a new pulsed laser system for SEE testing</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/167928</link>
<description>POUGET, V.; CALIN, T.; LAPUYADE, H.; LEWIS, D.; FOUILLAT, P.; VELAZCO, Raoul; MAIDON, Y.; SARGER, L.
</description>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/194978">
<title>Study of the effect of humidity on the performance of a patch antenna made from an eco-responsible wood substrate</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/194978</link>
<description>BOURRETERE, Clément; MARTINS, Valentin Lourenço; GHIOTTO, Anthony; DELETAGE, Jean-Yves
</description>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/197374">
<title>A Tool for Automatic Radiation-Hardened SRAM Layout Generation</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/197374</link>
<description>BRENDLER, Leonardo H.; LAPUYADE, Herve; DEVAL, Yann; REIS, Ricardo; RIVET, Francois
A new era of space exploration is emerging, characterized by a rapid surge in satellites and significant cost reductions. Memory circuits play a vital role in space applications, and it is essential to develop techniques to address the radiation-induced upsets in these circuits. This work extends a previously presented method to detect Multiple-Cell Upsets (MCU) in SRAMs for space applications. The method involves spatially interleaving an SRAM array with a network of radiation detectors. Considering the relationship between the radiation-hardening level and the area penalty added by the detection cells, a tool for automatically generating the SRAM layout with different configurations was developed and is presented in this work. The developed tool facilitates using the new method in commercial applications, providing different levels of protection according to the environment in which the circuit will be exposed.
</description>
<dc:date>2023-12-04T00:00:00Z</dc:date>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/194984">
<title>Reliability Investigation of 0.18mum CMOS for Oilfield Applications</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/194984</link>
<description>TRAN, Yen; NOMURA, Toshihiro; CHERCHALI, Mohamed Salim; TASSIN, Claire; DEVAL, Yann; MANEUX, Cristell
We investigated the degradation due to bias temperature instability (BTI) and hot carrier injection (HCI) for 0.18micrometer CMOS (Complementary Metal-Oxide- Semiconductor) under extreme temperature operations (150 deg C and 210 deg C). The transistors have been applied dedicated DC bias and temperature conditions to investigate each intrinsic wear-out mechanism in specific severe environment for oilfield applications. The aging tests have been monitored for up to 1,000 hours. These results are preliminarily used to develop equations reflecting aging laws to be included in commercial software tool for further investigation at logic circuit level.
</description>
<dc:date>2021-09-27T00:00:00Z</dc:date>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/97574">
<title>A 4 Gsample/s 2 bits flash ADC with 2–4 GHz input bandwidth for radio astronomy application</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/97574</link>
<description>DESCHANS, D.; BÉGUERET, J.-B.; DEVAL, Y.; SCARABELLO, C.; FOUILLAT, P.; MONTIGNAC, G.; BAUDRY, Alain
</description>
<dc:date>2006-01-01T00:00:00Z</dc:date>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/188982">
<title>Un convertisseur radiofréquence large-bande utilisant la transformée de Walsh pour application 5G et au delà</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/188982</link>
<description>Un convertisseur radiofréquence large-bande utilisant la transformée de Walsh pour application 5G et au delà
FERRER, Pierre; RIVET, Francois; LAPUYADE, Herve; DEVAL, Yann
</description>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/188983">
<title>Une méthode LMS par blocs utilisant la transformée de Walsh pour de la prédistorsion numérique d'amplificateur de puissance</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/188983</link>
<description>Une méthode LMS par blocs utilisant la transformée de Walsh pour de la prédistorsion numérique d'amplificateur de puissance
FELLMANN, Maxandre; RIVET, Francois; KERHERVE, Eric; DEVAL, Yann; DELTIMPLE, Nathalie
</description>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/189124">
<title>A Low-Noise mm-Wave Injection-Locked Oscillator designed in 65nm Partially Depleted SOI CMOS Technology</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/189124</link>
<description>DUMONT, Romane; MATOS, Magali De; CATHELIN, Andreia; DEVAL, Yann
A low-phase-noise injection-locked oscillator (ILO) based on a cross-coupled oscillator topology is presented. The prototype ILO was designed and fabricated in a 65-nm Partially Depleted SOI (PD-SOI) CMOS technology from STMicroelectronics. The 27.47 GHz free-running oscillator exhibits a phase noise of -119.23 dBc/Hz at 10-MHz offset, and its robustness to process variations is less than 4 dB. Using a common mode injection, the proposed ILO generates an output frequency at 27.5-GHz when the oscillator is injection-locked by the 5th harmonic of a 5.5 GHz reference. In injection-locked mode, the phase noise performance is then -116.75 dBc/Hz and - 135 dBc/Hz at 1-MHz and 10-MHz offsets, respectively, while solely consuming 2.06 mW from a 1 V supply. The total active area is 0.031 mm 2 (excluding I/O pads).
</description>
<dc:date>2021-06-13T00:00:00Z</dc:date>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/189125">
<title>RFIC design by mathematics for next generation wireless access</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/189125</link>
<description>DEVAL, Yann
</description>
</item>
<item rdf:about="https://oskar-bordeaux.fr/handle/20.500.12278/140606">
<title>Thermal Modelling and Power Consumption Estimation of a Multi Floor Small Scale Building Using SPICE Simulator</title>
<link>https://oskar-bordeaux.fr/handle/20.500.12278/140606</link>
<description>DONDON, P.-H.; BULUCEA, C. A.
</description>
<dc:date>2022-02-09T00:00:00Z</dc:date>
</item>
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